Bus System

This is a System board

Industry Standard Architecture (ISA) Bus

a) The most common bus in the world

b) ISA = Industry Standard Architectture

c) It's speed is more than sufficient for many devices 

Micro Channel Architectue (MCA) Bus

a) MCA also called as Micro Channel Bus

b)IMB's attempt to replace the ISA bus with something "bigger & better"

Extended Industry Standard Achirtecture (EISA) Bus

a) EISA bus never became widely used and cannot be considered an industry standard.

VESA Local Bus (VLB)

a) The first local bus to gain popularity

b) VESA local bus was introduced in 1992.

c) VESA = Video Electronics Standards Association

d) It's development was due to video improvement of PCs.

Peripheral Component Interconnect (PCI) Local Bus

a) Most popular local I/O bus & developed in 1993.

b) It is a popular high-bandwidth, processor independent bus that function as peripheral bus.

Accelerated Graphics Port (AGP)

a) AGP was developed in response to the trend towards greater & greater performance requirements for video.

b)As software evolves & computer use continues into previously unexplored areas such as 3D acceleration and full-motion video playback.

Performance of a bus is defined by:

Transfer Time

a) The time taken for data to delivered in a single transaction.

Bandwidth

a) Units of bits per second (bps).

b) Product of the number of bits that can be transferred in parallel in any one transaction by the number of transactions that can occur in one second.

PCI Bus Performance

Burst Mode

a) The PCI bus can transfer information in a burst mode, where after an initial address is provided multiple sets of data can be transmitted in a row.

Bus Mastering

a) PCI supports full bus mastering, which helps to improve performance.

High Bandwidth Options

a) The PCI bus specification version 2.1 calls for expandability to 64 bits and 66MHz speed.

Data & Address Buses

Data bus : Is the lines that carry the data being transferred.

Address bus : The set of line that carry info where the data is to be transferred to or from.

Control Bus

Control Bus : Control lines that controls bus function and to signal when data is available.

Bus Width

a) Number of bits that can travel in parallel down the bus.

b) More info can flow over the channel when it is wider.

c) The old PC were 16bits ~ 32 bits, latest were 64bits.

Bus Speed

a) How many bits of info can be sent across each wire each second.

b) Analogy: how fast the fast are drive on our analogical highway.

c) Most buses transmit one bit of data per clock cycle, but newer can be double of the speed.

Bus Bandwidth

a) Total amount of data transferred on the bus in a give unit of time.

b) Measured in bits/bytes per second.

c) Bandwidth = bus width x bus speed

d) For slow bus, bandwidth = half of the normal bandwidth

There few popular buses that modern compute consist of~ !

                      The Processor Bus (System Bus)

The highest-level bus that chipset uses to send information to and from processor.

                  The Cache Bus (Backside Bus)

Higher-level architectures, employ a dedicated bus to access system cache.

The Memory Bus    

Second-level system bus that connects the memory subsystem to chipset and the processor.

              

                                The Local I/O Bus (High-speed I/O Bus)

It has high input & output fro connecting performance-critical peripheral in the memory. One of the example is video card.

 The Standard I/O Bus

Used for slower peripherals. Examples, mouse, modem, sound card & etc.

Recall:

Pheripehral is devices other than CPU & Primary storage.

There was first Traditional (ISA) Bus Architecture, a old bus with cache.

Then ,there is a High Performance Bus Architecture

There is problem in bus that you have to know!

Single Bus Problem

Lots of devices on one bus normally face quite a number of problem the common one are delay the propagation, because connecting many device will lead to long data paths and meaning that co-ordination of bus use can adversely affect the performance if aggregate data transfer approaches bus capacity.

The solution are : Using multiple buses to overcome the problems.

This is how a bus looks like in physical form !

It consist of :-

a) Parallel lines on circuit boards

b) Ribbon cables

       c) Strip connectors on mother boards

d) Sets of wires